Gaussian Frequency Shift Keying (GFSK) and Gaussian Minimum Shift Keying (GMSK) have been used in a number of digital communication system applications, including Second Generation Cordless Telephone (CT-2) and Groupe Speciale Mobile (GSM). Future applications of GMSK/GFSK include Digital European Cordless Telephone (DECT) (1.152 mega-bits-per-second, Mbps, data rate) and Radio Local Area Network (RLAN) (1.0 Mbps data rate).
A conventional GFSK modulator 100 as shown in FIG. 1 of the accompanying drawings shows a Gaussian Pre-Modulation Filter 104 with a time-bandwidth product BT for band limiting the nonreturn-to-zero (NRZ) data input 102. The resulting signal is then input into an FM modulator 106 having a maximum deviation set to .DELTA..theta. Hz for providing the GFSK signal 108.
A conventional approach for demodulating GFSK information in a radio is to use an analog discriminator followed by a low-pass filter and center slicer (as a decision device). Although this demodulation method has been implemented successfully in the past, the complexity of the circuitry associated with an analog discriminator and its required tuning make it difficult to implement. Overall size and cost of the radio tends to increase with such circuitry. DC offsets inherent in analog circuitry can also make accurate frequency control difficult to achieve. Implementation of other communication functions, such as algorithms for synchronization and diversity, are difficult to implement. Furthermore, the combined band-limiting of the pre-modulation filter and the receive filters results in degraded bit error rate (BER) performance, which causes degraded receiver sensitivity in the radio.
A conventional analog demodulator for GFSK is illustrated in FIG. 2. Demodulator 200 includes an intermediate frequency (IF) filter 204 which is used to limit the noise level of the IF input signal 202, followed by a limiter/discriminator 206, a post-detection low-pass filter 208 for further noise reduction, and a center slicer 210 to slice the output into bits 212. The conventional center slicer 210 compares the frequency information signal or differential phase signal, .DELTA..theta., to a zero threshold. When slicer circuit 210 is used nearly all bit errors occur on the two alternating bit patterns, namely, "010" and "101".
Referring to FIG. 3, a graph showing the relationship between the differential phase signal, .DELTA..theta., and normalized symbol number for a set of bit patterns from "000" to "111" is shown. The combined band-limiting of the pre-modulation, IF, and post-detection filters results in the formation of eye patterns. The tighter the eye pattern, the worse the number of bit errors produced by the demodulator. The bit patterns "010" and "101", as shown by the eye diagrams of FIG. 3, produce the worst eye closure (i.e. eye opening=33%) and are therefore the dominant source of bit errors. The eye patterns illustrated in FIG. 3 were developed using the RLAN system parameters, where the data rate is 1.0 Mbps, the Gaussian pre-modulation filter has a BT product of 0.39, the FM modulator has its deviation set to 250 kilo-hertz (KHz), and the IF filter is a 1 mega-hertz (MHz) SAW filter. Time and phase quantization noise inherent in digital demodulators would produce even further increases in BER (e.g., tighter eye patterns) beyond those produced by analog demodulators.
An alternative data slicer structure used in demodulators is described in an article entitled, "Multilevel Decision Method for Band-Limited Digital FM with Limiter-Discriminator Detection". The article is found in IEEE Transactions on Vehicular Technology, VOL. VT-33, No. 3, August 1984. Although this method improves bit error rate performance over conventional data slicers, it requires four thresholds that need to be set accurately. It is also sensitive to time and frequency errors, variations in frequency deviation, and quantization noise.
Hence, there is a need for a demodulator that can provide a reduction in bit error rate and be easily manufactured in an integrated circuit.